|Place of Origin:||Shenzhen,China|
|Certification:||CE, ROHS, FCC|
|Minimum Order Quantity:||1 PCS|
|Packaging Details:||10PCS / Blister box|
|Delivery Time:||3-10 work day|
|Payment Terms:||L/C, T/T|
|Supply Ability:||50,000 pcs/Month|
|High Channel Capacity:||40Gbps||Distance:||300M|
|Fiber Type:||MM||Temperature:||-5°C To 70°C|
High Channel Capacity: 40 Gbps per module
Up to 11.1Gbps Data rate per channel
Maximum link length of 100m links on OM3 multimode fiber
Or 150m links on OM4 multimode fiber
High Reliability 850nm VCSEL technology
Digital diagnostic SFF-8436 compliant
Case operating temperature range:0°C to 70°C
Power dissipation < 1.5 W
TRANSCOM’s TS-Q40GSR4 are designed for use in 40 Gigabit per second links over multimode fiber. They are compliant with the QSFP+ MSA and IEEE 802.3ba 40GBASE-SR4.
The optical transmitter portion of the transceiver incorporates a 4-channel VCSEL (Vertical Cavity
Surface Emitting Laser) array, a 4-channel input buffer and laser driver, diagnostic monitors, control and bias blocks. For module control, the control interface incorporates a Two Wire Serial interface of clock
and data signals. Diagnostic monitors for VCSEL bias, module temperature, transmitted optical power,
received optical power and supply voltage are implemented and results are available through the TWS interface. Alarm and warning thresholds are established for the monitored attributes. Flags are set and interrupts generated when the attributes are outside the thresholds. Flags are also set and interrupts generated for loss of input signal (LOS) and transmitter fault conditions. All flags are latched and will remain set even if the condition initiating the latch clears and operation resumes. All interrupts can be masked and flags are reset by reading the appropriate flag register. The optical output will squelch for loss of input signal unless squelch is disabled. Fault detection or channel deactivation through the TWS interface will disable the channel. Status, alarm/warning and fault information are available via the TWS interface.
The optical receiver portion of the transceiver incorporates a 4-channel PIN photodiode array, a
4-channel TIA array, a 4 channel output buffer, diagnostic monitors, and control and bias blocks. Diagnostic monitors for optical input power are implemented and results are available through the TWS interface. Alarm and warning thresholds are established for the monitored attributes. Flags are set and interrupts generated when the attributes are outside the thresholds. Flags are also set and interrupts generated for loss of optical input signal (LOS). All flags are latched and will remain set even if the condition initiating the flag clears and operation resumes. All interrupts can be masked and flags are reset upon reading the appropriate flag register. The electrical output will squelch for loss of input signal (unless squelch is disabled) and channel de-activation through TWS interface. Status and alarm/warning information are available via the TWS interface.
Ⅰ Absolute Maximum Ratings
|Power Supply Voltage||VCC||-0.3||-||4||V|
|Signal Input Voltage||Vcc-0.3||-||Vcc+0.3||V|
Ⅱ Recommended Operating Conditions
|Case Operating Temperature||Tcase||0||-||70||ºC||Without air flow|
|Power Supply Voltage||VCC||3.14||3.3||3.46||V|
|Power Supply Current||ICC||-||350||mA|
|Data Rate||BR||10.3125||Gbps||Each channel|
|Transmission Distance||TD||-||100||m||OM3 MMF|
Ⅲ Optical Characteristics
|Average Launch Power each lane||-7.6||0.5||dBm|
|Spectral Width (RMS)||σ||0.65||nm|
|Optical Extinction Ratio||ER||3||dB|
|Average launch Power off each lane||Poff||-30||dBm|
|Transmitter and Dispersion Penalty each lane||TDP||3.5||dB|
|Optical Return Loss Tolerance||ORL||12||dB|
|Output Eye Mask||Compliant with IEEE 802.3ba|
|Rx Sensitivity per lane||RSENS||-9.5||dBm||1|
|Input Saturation Power (Overload)||Psat||2.4||dBm|
IV. Electrical Characteristics
|Input differential impedance||Rin||100||Ω||1|
|Differential data input swing||Vin,pp||180||1000||mV|
|Single ended input voltage tolerance||VinT||-0.3||4.0||
|Differential data output swing||Vout,pp||300||850||mV||2|
|Single-ended output voltage||-0.3||4.0||
1. Connected directly to TX data input pins. AC coupled thereafter.
2. Into 100 ohms differential termination.
Digital Diagnostic Functions
TRANSCOM’s TS-Q40GSR4 support the 2-wire serial communication protocol as defined in the
QSFP+ MSA.,which allows real-time access to the following operating parameters:
Laser bias current
Transmitted optical power
Received optical power
Transceiver supply voltage
It also provides a sophisticated system of alarm and warning flags, which may be used to alert end-users when particular operating parameters are outside of a factory-set normal range.
The operating and diagnostics information is monitored and reported by a Digital Diagnostics Transceiver Controller inside the transceiver, which is accessed through the 2-wire serial interface. When the serial protocol is activated, the serial clock signal (SCL pin) is generated by the host. The positive edge clocks data into the QSFP+ transceiver into those segments of its memory map that are not write-protected. The negative edge clocks data from the QSFP+ transceiver. The serial data signal (SDA pin) is bi-directional for serial data transfer. The host uses SDA in conjunction with SCL to mark the start and end of serial protocol activation. The memories are organized as a series of 8-bit data words that can be addressed individually or sequentially. The 2-wire serial interface provides sequential or random access to the 8 bit parameters, addressed from 00h to the maximum address of the memory.
This clause defines the Memory Map for QSFP+ transceiver used for serial ID, digital monitoring and certain control functions. The interface is mandatory for all QSFP+ devices. The memory map has been changed in order to accommodate 4 optical channels and limit the required memory space. The structure of the memory is shown in Figure 2 -QSFP+ Memory Map. The memory space is arranged into a lower, single page, address space of 128 bytes and multiple upper address space pages. This structure permits timely access to addresses in the lower page, e.g. Interrupt Flags and Monitors. Less time critical entries, e.g. serial ID information and threshold settings, are available with the Page Select function. The structure also provides address expansion by adding additional upper pages as needed. For example, in Figure 2 upper pages 01 and 02 are optional. Upper page 01 allows implementation of Application Select Table, and upper page 02 provides user read/write space. The lower page and upper pages 00 and
03 are always implemented. The interface address used is A0xh and is mainly used for time critical data like interrupt handling in order to enable a “one-time-read” for all data related to an interrupt situation. After an Interrupt, IntL, has been asserted, the host can read out the flag field to determine the effected channel and type of flag.
For more detailed information including memory map definitions, please see the QSFP+ MSA